Motor control system with power failure protector

ABSTRACT

Motor control system in which a signal is derived indicating zero voltage on the line to the motor. The signal is applied to two inputs of logic means. One input resets itself with a time delay and if the other input still has the signal applied thereto the energizing circuit for the motor is inhibited.

United States Patent 1 [111 Grygera 1 May 22, 1973 [541 MOTOR CONTROLSYSTEM WITH [56] References Cited POWER FAILURE PROTECTOR UNITED STATESPATENTS Inventor: James T/8 Racine, 3,408,552 10/1968 Weber....' "321/14As igneez Eaton Corporation, Cleveland, Beuk Ct [22] Filed: July 26,1971 Primary Examiner1ames D. Trammell 1 pp No 165 894 Attorney-Yountand Tarolli [57] ABSTRACT [52] US. Cl ..317/l3 R, 307/215, 33127103114,Motor control System in which a g a1 is derived in Int Cl 02h 7/08dicating zero voltage on the line to the motor. The [581midoiiiI'lIIIIlIlIiii'k'iii 'li'ib1 33 SC, signal is iippiiii to inputsof iogic one SPELD COMM/IND circuit for the motor is inhibited.

21 Claims, 2 Drawing Figures input resets itself with a time delay andif the other input still has the signal applied thereto the energizingPatented May 22, 1973 3,735,202

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2 Sheets-Sheet 2 NQE MOTOR CONTROL SYSTEM WITH POWER FAILURE PROTECTORThe present invention relates to a motor control system with powerfailure protector.

The present invention relates to motor control systems and particularlyto a motor control system in which loss of power is sensed and a controloperation is performed.

In various types of motor control systems it is important to performsome type of control operation in the event that a power failure occurs.For example, in a motor control system where a regenerative powerconverter is gated each cycle of the voltage wave from an alternatingcurrent power source to return power from the motor, the reverse biasapplied by the power voltage wave is relied upon to extinguishconduction in each cycle during the regenerative mode of operation. Thisoccurs when the voltage wave becomes greater than the counterelectromotive force of the motor. Consequently, if the system is a threephase system and there is a power failure across one phase, theconductive elements, normally SCRs, in the regenerative power converter,which are normallyback-biased by that phase will not be reverse biasedand will not be extinguished once gated on as long as the motor isrunning. Not only will this draw high current, but if the motor powerconverter is gated into operation, additional heavy currents may bedrawn depending upon the reason for the loss of power on the singlephase.

Accordingly, it is an object of the present invention to provide a newand improved motor control system in which the loss of power on thepower line is sensed and a control operation performed to prevent thetransmission of power between the motor and the power lines.

A further object of the present invention is to provide a new andimproved motor control system in which transmission of power between thepower lines and the motor is prevented when the loss of power at thepower lines for a predetermined time is detected.

A still further object of the present invention is to provide in a motorcontrol system a new and improved power loss detector which provides afirst signal when the voltage of the source goes to zero and appliesthat signal directly to two inputs of logic means and is actuated if thesignal is present at the logic means after a predetermined time.

Further objects and advantages of the present invention will be apparentfrom the following detailed description thereof made with reference tothe accompanying drawings forming a part of the present application forall subject matter disclosed therein and in which:

FIG. 1 is a schematic diagram of a motor control system embodying thepresent invention; and

FIG. 2 is a more detailed circuit diagram of the portion of the systemof FIG. 1 for sensing the power loss and performing a control operation.

The present invention is susceptible of use with various types of motorcontrol systems but is particularly useful in a regenerative type motorcontrol system such as disclosed in my co-pending applications, Ser. No.165,983 and Ser. No. 165,469, filed concurrently herewith and assignedto the same assignee as the present invention and respectively entitledRegenerative Motor Control System and Motor Control System. The subjectmatter of those applications is incorporated herein by reference.

Referring to FIG. 1, a motor 10 which is to be controlled is a directcurrent motor which is energized from a three phase power sourcecomprising power lines 12. The power lines are connected to the motorthrough a power converter 14. The power converter 14 is preferably afull-wave rectifier bridge of the SCR type with the SCRs being gated oneach cycle of the power source when the current is to be conducted tothe motor. The phase in the cycle that the SCRs of the power converter14 are gated on is determined by a variable phase pulse generator 16which produces gating pulses for the SCRs at a phase determined by aspeed command signal derived from a speed command source 18.Conventionally, the phase of pulses is determined by the magnitude ofthe speed command signal.

In the system illustrated in FIG. 1, the motor is connected to the powerlines when it is operating in a regenerative mode to return power to thepower lines by a regenerative full-wave rectifier bridge 20. Thefullwave regenerative rectifier bridge 20 is gated in each cycle by avariable phase pulse generator 22, the phases of the pulses from thephase generator 22 being determined by the magnitude of the speedcommand signal. To determine whether the motor is operating in aregenerative or motoring mode, the counter electromotive force of thearmature is compared in a logic circuit 24 with the speed command signalto determine when the speed command signal is of such a magnitude thatthe phase of the gating pulse to the SCRs in the power converter 14 issuch that the counter electromotive force of the motor will back-biasthe SCRs in the power converter 14 and prevent conduction when the SCRsare gated at that phase. When this condition exists and the armaturecurrent becomes 0 the logic circuit 24, which also senses armaturecurrent, the pulses from the variable phase pulse generator to the powerconverter 14 are inhibited and the pulses from the variable phase pulsegenerator 22 to the regenerative power converter 20 are enabled toeffect operation of the bridge 20. In the illustrated embodiment, theoutput of the variable phase pulse generators 16, 22 are respectivelyconnected to inhibit lines 26, 28 through respective diode circuits 30so that the pulses being transmitted are inhibited if the lines 26, 28are at a low level and are enabled if the lines 26, 28 are at a highlevel. In operation, the circuit 24 will enable one of the powerconverters and disable the other. The circuit 24 may be as shown anddescribed in detail in my copending application entitled RegenerativeMotor Control System, filed concurrently herewith and assigned to thesame assignee as the present invention.

In accordance with the present invention, a power loss circuit 32detects the loss of power on any phase of the three-phase system 12 andapplies an inhibit signal to the inhibit lines 26, 28 to prevent thetransmission of pulses to either the power rectifying bridge 14 or thepower rectifying bridge 20 in the event of the loss of power.

Referring to FIG. 2, the power loss circuit has an output terminal 34and an output terminal 35 connected to the inhibit lines 26, 28,respectively. The output terminals 34, 35 will have a high level signalthereon which will enable the pulses to be transmitted between thevariable phase pulse generators and the power converters, in the absenceof low level signals on the lines by the circuit 24, as long as an SCR40 is nonconductive. If the SCR 40 is rendered conductive, the signalsat terminals 34, 35 will drop to a low level and this will inhibit thetransmission of pulses to the power converters regardless of the signalsapplied to the inhibit lines 26, 28 by the logic circuit 24.

The power loss circuit 32 has input terminals 41, 42 connected acrossone phase of the three phase power supply 12, terminals 43, 44 connectedacross another phase, and terminals 45, 46 connected across the thirdphase.

The basic operation of the logic for each phase is substantially thesame and the description will now proceed with the phase to whichterminals 41, 42 are connected. The terminals 41, 42 are connected bydiodes 47, 48 to the base of transistor 50 to provide full-waverectification of the phase voltage to the base. When the alternatingcurrent voltage across the terminals 41, 42 is positive, the terminal 41being positive relative to the terminal 42, the transistor 50 isrendered conductive to establish a low level or logic at its collector51. The low level of the collector 51 is applied to the inputs of aninverting NAND gate 52 whose output is applied to the inputs of aninverting NAND gate 53 and an inverting NAND gate 54. Consequently, thelow level output on the collector 51 results in a logic 1 signal beingapplied to the inputs of the NAND gates 53, 54 to establish low level orlogic 0 outputs on the outputs of the NAND gates 53, 54.

As the positive voltage lobe drops to zero, transistor 50 will be cutoff to indicate that the voltage on the phase to which the terminals 41,42 are connected has become zero. When this happens, the transistor 50is cut off to provide a high level output at its collector to apply alogic 1 to the input of NAND gate 52. Accordingly, a logic 1 signal tothe inputs of NAND gate 52 is a signal indicating that the voltage onthe phase is zero. The application of a logic 1 to the inputs of NANDgate 52 changes its outputs to a logic 0 to change the outputs of NANDgates 53, 54 to logic ls. The logic 1 from the NAND gate 54 is applieddirectly to one input 561: of a NAND gate 56 to condition the NAND gateto have a logic 0 output. The NAND gate 56 normally has a logic 1 on itsinput 561) so that unless input 56b is changed to a logic 0, theestablishment of a logic 1 on the input 56a in response to theno-voltage signal will change the output of the NAND gate 56 from alogic 1 to a logic 0 when the output of NAND gate 54 changes from alogic 0 to a logic 1. This is, however, normally prevented by theoperation of NAND gates 53, 58. Simultaneously with the change in theoutput of NAND gate 54 from a logic 0 to a logic 1 in response to ano-voltage logic 1 signal, the output of NAND gate 53 will switch from alogic 0 to a logic 1 to immediately establish a logic 1 at the inputs ofthe NAND gate 58. The output of the NAND gate 53 is connected to ajunction 60 between a resistor connected to the positive side of thepower supply and a condenser 62, the condenser 62 having its negativeside connected to the inputs of the NAND gate 58 and to the negativeside of the power supply by a resistor 63. When the output of NAND gate53 switches to a logic 1, the negative side of the condenser 62 willimmediately switch to a higher level to establish a logic I to theinputs of the NAND gate 58 to change its output from a logic 1 to alogic 0. Consequently, when the logic 1 signal from the transistor 50effects the application of a logic 1 signal to the input 560 of NANDgate 56, it also effects, through the NAND gates 53 and 58, the changefrom a logic 1 to a logic 0 on the input 56bof the gate 56.Consequently, the output of NAND gate 56 remains a logic 1 and does notchange. I

If the alternating current lobe on the phase continues through zero, thetransistor will be turned back on because of the full-wave rectifyingdiodes 47, 48 connected between the terminals 41, 42 and the base oftransistor 50 to cause a loss of the no-voltage logic 1 signal at thetransistor 50 to in turn cause the loss of the logic 1 signal at theoutput of gate 54 and on the input 56a of the gate 56. When the input56a reverts to a logic 0, the output of gate 56 is clamped at a logic 1regardless of the signal on the input 56b.

The signal on the input 56b will revert to a logic 1 when the condenser62 is charged regardless of whether or not the output of NAND gate 53 isa logic 1 or is switched to a logic 0 as the voltage lobe on the phasebecomes negative to provide a logic 0 output at the gate 53.

It can be seen that in the event ofa power failure, the circuit willoperate in the same way as the described zero crossing to provide ano-voltage signal on the phase to the NAND gate 52 in the form ofa logic1 signal, This logic 1 signal will immediately establish, through theNAND gate 54, a logic I on the input 56a of the NAND gate 56 and a logic0, through the NAND gate 53 and the NAND gate 58, on the input 56b ofthe NAND gate 56. In the case ofa power failure, the logic 1 signal tothe NAND gate 52 will maintain a logic 1 input to the gate 56 on input56a, but it will not maintain a logic 0 on the input 56b because thecondenser 62 will charge to the higher level of the output of gate 53and at that time the input to the NAND gate 58 will change from a logic1 to a logic 0 since the inputs will assume the ground potential.Accordingly, it can be seen that the voltage across the phase is zerofor longer than necessary to charge the condenser 62 to the higherlevel, the NAND gate 56 will have two logic Is on its input and itsoutput will shift to a logic 0.

The output of NAND gate 56 is applied to one input of a NAND gate 65whose other input has a logic 1 maintained thereon. Consequently, whenthe output of the NAND gate 56 is a logic 1, the output of NAND gate 65is a logic 0 which is inverted by a NAND gate 67 to provide a logic 1 atits output. When there is a logic 1 output at the NAND gate 67, atransistor 70 is rendered conductive. The transistor 70 is connectedbetween the gate and the cathode of the SCR 40 and when it isconductive, the SCR 40 does not fire. Consequently, when the output ofthe gate 67 is a logic 1, as it is when there is voltage on the phase,the transistor 70 is conductive to maintain the SCR non-conductivewhich, in turn, maintains a high level signal at output terminals 34, 35connected to the inhibit lines for the power converters. If, however,the output of NAND gate 56 changes to a logic 0 as it will in the caseof a power failure for a greater length of time necessary than thatrequired to charge the condenser 62, the output of NAND gate 56 willchange from a logic 1 to a logic 0 to change the output of NAND gate 65from a logic 0 to a logic 1 to in turn change the output of NAND gate 67from a logic 1 to a logic 0 to cut off the transistor 70 and toestablish a gate triggering voltage on the SCR 40. This will apply aninhibiting signal to the inhibit lines to prevent operation of themotoring or regenerating power converters and this will be maintaineduntil the voltage is removed from across the anode and cathode of theSCR 40 to reset the circuit.

The phases to which the terminals 43, 44 and the terminals 45, 46 areconnected have corresponding circuitry insofar as the transistor 50, theNAND gate 52, the NAND gates 53, 54, the condenser 62, and the NAND gate58 are concerned. These components have been given the same referencenumerals as the described components with respect to the phase to whichterminals 41, 42 are connected except the components corresponding tothe phase to which the terminals 43, 44 are connected have been givenprime marks and the phase to which the terminal 45, 46 are connectedhave been given double prime marks. The outputs of the NAND gates 56'and the NAND gates 56" for the other two phases are connected to a NANDgate 65a which functions in the same manner as the NAND gate 65 exceptthat the NAND gate 65 has a fixed input while the NAND gate 65a has oneinput from the NAND gate 56' and one input from the NAND gate 56".Accordingly, since the output of NAND gates 56', 56" are normally logic1 s unless there is a power failure, at which time they switch to alogic 0, the output of NAND gate 65a is normally a logic 0. This will,however, shift to a logic 1 if power is lost on either phase to changeeither input to the NAND gate 65a to a logic 0. The logic 1 output isthen inverted by a NAND gate 670 to establish a low level signal at theoutput of gate 67a which is connected to the base of transistor 70 torender the latter non-conductive to fire the SCR 40 to provide a lowlevel inhibit signal at the terminals 34, 35. It can be seen that thegates 67, 67a are connected so that if either gate goes to a low level,the transistor 70 will be turned off to trigger the SCR 40 and provide alow level inhibit signal on the output terminal 34, 35.

From the foregoing, it can be seen that when the voltage on a phasecrosses zero or fails, a no-power signal appears at the collector oftransistor 50, 50', 50" depending on the phase. The establishment of thenopower signal activates means, e.g. gates 53, 58 and condenser 62, toprovide a pulse signal of a predetermined time duration and logic means,e.g. gate 65, which has inputs which change with the pulse signal andthe nopower signal is activated to prevent conduction of current betweenthe motor and power lines if the no-power signal is present and thepulse signal absent.

What is claimed is:

I. In a motor control system, a cyclical power source having a voltagewhich is periodically zero, a motor, power circuit means for connectingsaid motor and said source to transmit current therebetween, and circuitmeans for preventing transfer of current between said motor and saidsource in response to a failure of power in said power circuitcomprising signal means for sensing a condition in said circuitindicative of power from said source and responsive to the sensing ofthe absence of power from the source for providing a nopower signalwhile the power is absent and control means connected to receive saidsignal and responsive to said no-power signal for preventing conductionof current between said motor and source when power is lost from saidsource.

2. In a motor control system as defined in claim 1 wherein said controlmeans comprises first means actuated from a first state to a secondstate for a predetermined time in response to the establishment of saidnopower signal, and second means actuated to prevent conduction of saidcurrent in response to the existence of said no-power signal and saidfirst state of said first means.

3. In a motor control system as defined in claim 1 wherein said sourceis a poly-phase A.C. source and said circuit means comprises arectifying bridge means including controllable rectifiers to beback-biased by said source to periodically turn off the rectifiers forconducting current between said source and said motor and pulsegenerating means for generating pulses to gate said bridge intoconduction during a half-cycle of said A.C. source, and said signalmeans comprises means for sensing a condition indicative of the voltageon the phases of said poly-phase source to provide said no-power signalin the absence of a voltage on any of said phases.

4. In a motor control system as defined in claim 3 wherein said controlmeans comprises means for inhibiting the transmission of pulses fromsaid pulse generating means to said rectifying means.

5. In a motor control system as defined in claim 3 wherein said bridgemeans includes a regenerative bridge for conducting current from saidmotor to said source.

6. In a motor control system as defined in claim 5 wherein said controlmeans comprises means for inhibiting the transmission of pulses fromsaid pulse generating means to said bridge means.

7. .In a motor control system as defined in claim 1 wherein said sourceis an A.C. source and said signal means is responsive to the voltage ofsaid source being substantially zero and said control means is actuatedin response to said control signal being zero for a predetermined timeto prevent conduction of current by said bridge while the conditionexists.

.8. In a motor control system as defined in claim 1 wherein said sourceis a poly-phase source and said signal means is responsive to loss ofpower on any phase to provide said no-power signal and said controlmeans comprises means for preventing conduction of power on the otherphases of the system while power is lost on any phase.

9. A motor control circuit as defined in claim 1 wherein said circuitmeans comprises a siliconcontrolled rectifier means.

10. A motor control circuit as defined in claim 3 wherein said circuitmeans comprises a siliconcontrolled rectifier means.

11. A motor control circuit as defined in claim 10 wherein said circuitmeanscomprises a motoring bridge and a regenerative bridge forconducting current between said motor and said source.

12. In a motor control system as defined in claim 3 wherein said controlmeans comprises first means responsive to the establishment of saidno-power signal to provide a pulse signal of predetermined timeduration, and second means having one input connected to receive saidpulse signal and another input which has a predetermined signal appliedthereto while said nopower signal exists and a different signal appliedthereto when it does not exist, said second means being actuated toprevent conduction of current by said bridge means in response to theabsence of a pulse on said one input and the existence of saidpredetermined signal on said another input.

13. In a motor control system as defined in claim 8 wherein said controlmeans comprises first means responsive to the establishment of saidno-power signal to provide a pulse signal of predetermined timeduration, and second means having one input connected to receive saidpulse signal and another input which has a predetermined signal appliedthereto while said nopower signal exists and a different signal appliedthereto when it does not exist, said second means being actuated toprevent conduction of current by said bridge means in response to theabsence of a pulse on said one input and the existence of saidpredetermined signal on said another input.

14. In a motor control system, a power source, a motor, power circuitmeans for connecting said motor and said source to transmit powertherebetween, and means for preventing transfer of power between saidmotor and said source in response to a failure of power from said sourcecomprising signal means responsive to the absence of power for providinga no-power signal while the power is absent and control means responsiveto the existence of said signal for a predetermined time for preventingconduction of current between said motor and power source, said controlmeans comprising first means responsive to the establishment of saidno-power signal to provide a pulse signal of predetermined timeduration, and second means having one input connected to receive saidpulse signal and another input which has a predetermined signal appliedthereto while said no-power signal exists and a different signal appliedthereto when it does not exist, said second means being actuated toprevent conduction of current between said source and motor in responseto the absence of a pulse on said one input and the existence of saidpredetermined signal on said another input.

15. In a motor control system as defined in claim 10 wherein said sourceis an alternating current source and said signal means is responsive tothe voltage of said source being substantially zero, and said no-powersignal provides said pulse signal as the voltage of said source changespolarity.

16. In a motor control system, a power source, a motor, power circuitmeans for connecting said motor and said source to transmit powertherebetween, and means for preventing transfer of power between saidmotor and said source in response to a failure of power from said sourcecomprising signal means responsive to the absence of power for providinga no-power signal while the power is absent and control means responsiveto the existence of said signal for a predetermined time for preventingconduction of current between said motor and power source, said sourcebeing an alternating current source and said signal means beingresponsive to the voltage of said source being substantially zero, saidno-power signal beinga pulse output as the voltage of said sourcechanges polarity.

17. In a motor control system, an alternating current power source,first controllable rectifying bridge means for conducting current in onedirection from said source to a motor, second controllable rectifyingbridge means conducting current in a second direction from said load tosaid source, said first and second bridge means comprising controllablerectifiers periodically back-biased by said source to turn off therectifiers and signal means for sensing a condition indicating a failureof power from said source and for providing a no-power signal inresponse to such failure, and control means responsive to said no-powersignal for inhibiting operation of at least one of said bridge means toconduct current upon a loss of power from said source to said bridgemeans.

18. In a motor control system as defined in claim 17 wherein said sourceis a polyphase source and said sensing means senses a loss of power onany phase to provide said no-power signal.

19. In a control system as defined in claim 18 wherein said controlmeans comprises means for distinguishing between a change in electricalpolarity on a phase and a loss of power on a phase to precludeinhibiting of said bridge means in response to a change of electricalpolarity.

20. In a control system as defined in claim 1 wherein said power sourceis a polyphase A.C. source and said control means comprises means fordistinguishing between a loss of power on a phase and a change ofpolarity on a phase, and said bridge means being motoring andregenerative bridges respectively.

21. A method of controlling the firing of siliconcontrolled rectifiersin controllable bridges connected across a polyphase AC. power supplyfor conducting current in respective opposite directions between a motorand the source, electrically monitoring the power supply to determinewhether the power source has failed to where it is not capable ofback-biasing controlled rectifiers in the bridges, establishing anelectrical signal indicating such a failure of the power source, andusing said signal to actuate control circuitry for rendering saidbridges ineffective to conduct current while said failure exists.

1. In a motor control system, a cyclical power source having a voltagewhich is periodically zero, a motor, power circuit means for connectingsaid motor and said source to transmit current therebetween, and circuitmeans for preventing transfer of current between said motor and saidsource in response to a failure of power in said power circuitcomprising signal means for sensing a condition in said circuitindicative of power from said source and responsive to the sensing ofthe absence of power from the source for providing a no-power signalwhile the power is absent and control means connected to receive saidsignal and responsive to said no-power signal for preventing conductionof current between said motor and source when power is lost from saidsource.
 2. In a motor control system as defined in claim 1 wherein saidcontrol means comprises first means actuated from a first state to asecond state for a predetermined time in response to the establishmentof said no-power signal, and second means actuated to prevent conductionof said current in response to the existence of said no-power signal andsaid first state of said first means.
 3. In a motor control system asdefined in claim 1 wherein said source is a poly-phase A.C. source andsaid circuit means comprises a rectifying bridge means includingcontrollable rectifiers to be back-biased by said source to periodicallyturn off the rectifiers for conducting current between said source andsaid motor and pulse generating means for generating pulses to gate saidbridge into conduction during a half-cycle of said A.C. source, and saidsignal means comprises means for sensing a condition indicative of thevoltage on the phases of said poly-phase source to provide said no-powersignal in the absence of a voltage on any of said phases.
 4. In a motorcontrol system as defined in claim 3 wherein said control meanscomprises means for inhibiting the transmission of pulses from saidpulse generating means to said rectifying means.
 5. In a motor controlsystem as defined in claim 3 wherein said bridge means includes aregenerative bridge for conducting current from said motor to saidsoUrce.
 6. In a motor control system as defined in claim 5 wherein saidcontrol means comprises means for inhibiting the transmission of pulsesfrom said pulse generating means to said bridge means.
 7. In a motorcontrol system as defined in claim 1 wherein said source is an A.C.source and said signal means is responsive to the voltage of said sourcebeing substantially zero and said control means is actuated in responseto said control signal being zero for a predetermined time to preventconduction of current by said bridge while the condition exists.
 8. In amotor control system as defined in claim 1 wherein said source is apoly-phase source and said signal means is responsive to loss of poweron any phase to provide said no-power signal and said control meanscomprises means for preventing conduction of power on the other phasesof the system while power is lost on any phase.
 9. A motor controlcircuit as defined in claim 1 wherein said circuit means comprises asilicon-controlled rectifier means.
 10. A motor control circuit asdefined in claim 3 wherein said circuit means comprises asilicon-controlled rectifier means.
 11. A motor control circuit asdefined in claim 10 wherein said circuit means comprises a motoringbridge and a regenerative bridge for conducting current between saidmotor and said source.
 12. In a motor control system as defined in claim3 wherein said control means comprises first means responsive to theestablishment of said no-power signal to provide a pulse signal ofpredetermined time duration, and second means having one input connectedto receive said pulse signal and another input which has a predeterminedsignal applied thereto while said no-power signal exists and a differentsignal applied thereto when it does not exist, said second means beingactuated to prevent conduction of current by said bridge means inresponse to the absence of a pulse on said one input and the existenceof said predetermined signal on said another input.
 13. In a motorcontrol system as defined in claim 8 wherein said control meanscomprises first means responsive to the establishment of said no-powersignal to provide a pulse signal of predetermined time duration, andsecond means having one input connected to receive said pulse signal andanother input which has a predetermined signal applied thereto whilesaid no-power signal exists and a different signal applied thereto whenit does not exist, said second means being actuated to preventconduction of current by said bridge means in response to the absence ofa pulse on said one input and the existence of said predetermined signalon said another input.
 14. In a motor control system, a power source, amotor, power circuit means for connecting said motor and said source totransmit power therebetween, and means for preventing transfer of powerbetween said motor and said source in response to a failure of powerfrom said source comprising signal means responsive to the absence ofpower for providing a no-power signal while the power is absent andcontrol means responsive to the existence of said signal for apredetermined time for preventing conduction of current between saidmotor and power source, said control means comprising first meansresponsive to the establishment of said no-power signal to provide apulse signal of predetermined time duration, and second means having oneinput connected to receive said pulse signal and another input which hasa predetermined signal applied thereto while said no-power signal existsand a different signal applied thereto when it does not exist, saidsecond means being actuated to prevent conduction of current betweensaid source and motor in response to the absence of a pulse on said oneinput and the existence of said predetermined signal on said anotherinput.
 15. In a motor control system as defined in claim 10 wherein saidsource is an alternating current source and said signal means isresponsive to the voltage of said source being substAntially zero, andsaid no-power signal provides said pulse signal as the voltage of saidsource changes polarity.
 16. In a motor control system, a power source,a motor, power circuit means for connecting said motor and said sourceto transmit power therebetween, and means for preventing transfer ofpower between said motor and said source in response to a failure ofpower from said source comprising signal means responsive to the absenceof power for providing a no-power signal while the power is absent andcontrol means responsive to the existence of said signal for apredetermined time for preventing conduction of current between saidmotor and power source, said source being an alternating current sourceand said signal means being responsive to the voltage of said sourcebeing substantially zero, said no-power signal being a pulse output asthe voltage of said source changes polarity.
 17. In a motor controlsystem, an alternating current power source, first controllablerectifying bridge means for conducting current in one direction fromsaid source to a motor, second controllable rectifying bridge meansconducting current in a second direction from said load to said source,said first and second bridge means comprising controllable rectifiersperiodically back-biased by said source to turn off the rectifiers andsignal means for sensing a condition indicating a failure of power fromsaid source and for providing a no-power signal in response to suchfailure, and control means responsive to said no-power signal forinhibiting operation of at least one of said bridge means to conductcurrent upon a loss of power from said source to said bridge means. 18.In a motor control system as defined in claim 17 wherein said source isa polyphase source and said sensing means senses a loss of power on anyphase to provide said no-power signal.
 19. In a control system asdefined in claim 18 wherein said control means comprises means fordistinguishing between a change in electrical polarity on a phase and aloss of power on a phase to preclude inhibiting of said bridge means inresponse to a change of electrical polarity.
 20. In a control system asdefined in claim 1 wherein said power source is a polyphase A.C. sourceand said control means comprises means for distinguishing between a lossof power on a phase and a change of polarity on a phase, and said bridgemeans being motoring and regenerative bridges respectively.
 21. A methodof controlling the firing of silicon-controlled rectifiers incontrollable bridges connected across a polyphase A.C. power supply forconducting current in respective opposite directions between a motor andthe source, electrically monitoring the power supply to determinewhether the power source has failed to where it is not capable ofback-biasing controlled rectifiers in the bridges, establishing anelectrical signal indicating such a failure of the power source, andusing said signal to actuate control circuitry for rendering saidbridges ineffective to conduct current while said failure exists.